Radio frequency (RF) transceivers are found in many one-way and two-way communication devices, such as portable communication devices, (cellular telephones), personal digital assistants (PDAs) and other communication devices. A RF transceiver transmits and receives signals using whatever communication methodology is dictated by the particular communication system within which it is operating. For example, communication methodologies typically include amplitude modulation, frequency modulation, phase modulation, or a combination of these. In a typical global system for mobile communications (GSM) mobile communication system using narrowband time-division multiple access (TDMA), a Gaussian minimum shift keying (GMSK) modulation scheme is used to communicate data.
The deployment of new wireless systems presents unique challenges to mobile handset designers. In order to reap the full benefit of expanded capacity and increased data bandwidth, the new handsets must work on both the new systems as well as the old. One of these new systems has been named Enhanced Data Rates for GSM Evolution (EDGE). The EDGE standard is an extension of the Global System for Mobile Communications (GSM) standard.
Conventional GSM/EDGE receiver architectures use a pair of circuits driven by mixers to separate components of the received signal. Generally, sine and cosine components of the received carrier signal are applied to mixers to extract the separate components. This “mixing” of the carrier signal produces what is referred to as in-phase or “I” signal component and a quadrature phase or “Q” signal component. These I and Q signal components are filtered and gain adjusted and finally sent to a baseband digital signal processor to extract the communicated data.
In recent years, GSM/EDGE receiver architectures have included very low intermediate frequency (VLIF) designs to avoid dealing with DC cancellation and second order input intercept point requirements for direct conversion receivers. A VLIF receiver architecture requires a relatively smaller integrated circuit footprint than the footprint for a direct conversion receiver due to the higher proportion of digital circuits and more relaxed analog filtering requirements. In addition, demodulation to baseband is performed in the digital domain. Therefore, for smaller complementary metal-oxide semiconductor (CMOS) geometries, a VLIF receiver architecture is attractive to receiver designers.
However, mismatch in the I and the Q signal paths due to imperfect mixers and anti-aliasing filters results in phase and gain imbalances between the I and Q signal paths. In addition, I and Q signal gain and phase errors result from frequency dependent variations in channel filters and various elements in the I and Q signal paths.
Prior art approaches to reduce gain and phase error variations include the design, selection and application of closely matched circuit elements in the I and Q signal paths as well as the performance of factory calibrations to determine gain and phase errors over various expected conditions. Both approaches have a significant impact on the cost of the transceiver and may not adequately address the phase and gain imbalances. The first approach increases the cost of procuring matched circuit elements with tight tolerances. The second or calibration approach increases the cost of procuring additional memory capacity to accommodate the range of possible gain and phase imbalances and the cost associated with testing and confirming adequate operation over a broad range of operating conditions.